Modeling approaches for first-level solder interconnects in shock and drop of electronics assemblies have been developed without any assumptions of geometric symmetry or loading symmetry. The problem involves multiple scales from macroscale transient-dynamics of electronic assembly to microstructural damage history of interconnects. Previous modeling approaches include, solid-to-solid submodeling using a half test PCB board, shell-to-solid submodeling technique using a quarter-symmetry model. Inclusion of model symmetry in state-of-the-art models saves computational time but targets primarily symmetric mode shapes. The modeling approach proposed in this paper enables prediction of both symmetric and antisymmetric modes, which may dominate an actual drop-event. Approaches investigated include smeared property models, Timoshenko-beam element models, explicit submodels, and continuum-shell models. Transient dynamic behavior of the board assemblies in free and JEDEC drop has been measured using high-speed strain and displacement measurements. Model predictions have been correlated with experimental data
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Lall et al. (2007) studied this question.
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