A Fast VLSI Multiplier for GF(2m)

Multiplication in the finite fieldGF(2ᵐ) has particular computational advantages in data encryption systems. This paper presents a new algorithm for performing fast multiplication inGF(2ᵐ), which isO(m)in computation time and implementation area. The bit-slice architecture of a serial-in-serial-out modulo multiplier is described and the circuit details given. The design is highly regular, modular, and well-suited for VLSI implementation. The resulting multiplier will have application in algorithms based on arithmetic in large finite fields of characteristic 2, and which require high throughput.