A 1-V 6-b 50-MSamples/s current-interpolating CMOS ADC

CMOS analog-to-digital converters (ADC's) require either bootstrapping techniques or low-threshold devices to function at low supply voltages. A 6-b 50-MSamples/s ADC in normal-threshold CMOS operates with a single battery cell as low as 0.9 V without bootstrapping. A current-interpolation approach is taken to configure a 1-V ADC system that does not allow more than one V/sub GS/ plus one V/sub DSsat/ between the supply rails. The prototype takes a rail-to-rail input and works with a single system clock. The chip fabricated in 0.35-/spl mu/m CMOS occupies an area of 2.4/spl times/2 mm/sup 2/ and consumes 10 mW each in analog and digital supplies.