Dual-gate accumulation mode thin film transistors have been fabricated for the first time in a-Si:H on bulk glass substrates. The devices display exceptionally high performance, as compared to previously reported single-gate a-Si:H transistors. For a channel length of 10 µm and width of 168 µm, drain currents in the range of 5-10 µA were obtained for gate biases of 15 V in both of the two conducting channels induced in the a-Si:H layer. The drain current of the TFT operating in the dual-gate mode was found to be larger than the arithmetic sum of the drain currents through the two individual channels obtained from single-mode operation. A significant difference in dc stability between the two channels was observed. The use of the dual-gate TFT as a diagnostic structure for studying interface properties and contact effects has been demonstrated.
No takes yet. Share an insight, caveat, or question.
Tuan et al. (1982) studied this question.
Synapse has enriched 5 related papers. Consider them for comparative context: