Control of SiO2/Si interface defects generation during thin dielectric film etching using CHxFy/Ar/O2plasma

We investigated the quantitative control of SiO 2 /Si interface defects caused by CH x F y /Ar/O 2 plasma etching. Both the number and the cause of interface defects generation strongly depended on the residual thicknesses of SiO 2 . When the residual thickness becomes small, in addition to the VUV/UV irradiation, ion injection caused a remarkable increase in the number of interface defects associated with Si dislocation. Complete recovery from damage was difficult by low-temperature thermal annealing, especially ion-induced damage. Ion-induced damage was suppressed by controlling the residual thickness of SiO 2 to be larger than the ion penetration depth. VUV/UV-induces damage could be effectively suppressed by using a light shield layer such as SiN. Moreover, VUV/UV-induces damage under a fine space pattern is expected to be suppressed in comparison with a wide-open pattern. Thus, the process design of a film stack, pattern, etching condition, and thermal annealing condition are important for controlling SiO 2 /Si interface defect generation during plasma processing.