A programmable four-tap analog finite-impulse-response filter for use in a decision-feedback equalizer has been realized in a 2-/spl mu/m double-poly CMOS process. It uses a modified transposed structure and double sampling to minimize power dissipation. Also, it uses programmable-gain sample-and-hold amplifiers with a constant feedback factor, input capacitance, and load to reduce the performance variation as a function of programming. The filter is fully differential, occupies an active area of 11.8 mm/sup 2/, and dissipates 56.5 mW.
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Rothenberg et al. (1995) studied this question.
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