Pentacene-Thin Film Transistors with ZrO[sub 2] Gate Dielectric Layers Deposited by Plasma-Enhanced Atomic Layer Deposition

The effect of the dielectric constant and surface roughness of gate dielectrics on the electrical performance of pentacene-thin-film transistor (TFT) was investigated using high-κ films deposited by plasma-enhanced atomic layer deposition. The dielectric constant of was in the range of 15.6–33.0, and the surface roughness was increased with in the presently reported devices. Threshold voltage and subthreshold swing were effectively reduced with increasing and were remarkably low, with values of and , respectively, when . To the contrary, the carrier mobility was determined by the surface roughness of gate dielectrics.