Chemical/Structural Nanocharacterization and Electrical Properties of ALD-Grown La[sub 2]O[sub 3]∕Si Interfaces for Advanced Gate Stacks

Atomic layer deposition (ALD) has received increasing attention in relation to the growth of high-permittivity rare-earth oxides for advanced gate stack applications. Transistor reliability strongly depends on the oxide/semiconductor interface properties. In this study, we perform transmission electron microscopy measurements in the high-resolution mode coupled with electron energy loss spectroscopy experiments to probe at the nanometric scale interface layer (IL) issues for ALD-grown stacks. Complementary results from electrical and X-ray diffraction measurements on selected samples are also discussed. We demonstrate that the film reactivity with the Si surface can be controlled up to a certain extent by appropriately choosing the ALD precursor combination. In particular, we prove that the scheme is more attractive than the one for depositing films because it gives rise to a lower IL thickness and interface trap density and to a smaller critical sample thickness for the stabilization of the high-κ hexagonal phase.