PWM Strategy for the Cancellation of Common-Mode Voltage Generated by Three-Phase Back-to-Back Inverters

This paper presents a pulse width modulation strategy for the cancellation of common-mode (CM) voltage generated by three-phase back-to-back two-level inverters. This method theoretically provides complete elimination of the CM voltage by synchronizing all the commutations of one converter with commutations of the other one, so that the overall resulting CM voltage does not vary. The degrees of freedom of this strategy are studied and an experimental implementation is carried out on a 15-kW motor drive prototype to validate the method effectiveness. Taking into account deadtime compensation, measurements in time and frequency domains show that the CM voltage is strongly reduced and that more than 15 dB reduction is achieved in a wide frequency range.