Precharged Phase Detector with Zero Dead-Zone and Minimal Blind-Zone

A precharged CMOS high-performance phase frequency detector (PFD) circuit is presented in this paper. The PFD consists of two identical building blocks. Each PFD block generates UP or DOWN signal and consists of [Formula: see text]- and [Formula: see text]-precharge stages connected in cascade. The proposed PFD circuit has no feedback path and has zero dead-zone in the phase characteristic, what is important in low jitter applications. It also has minimal blind-zone (extended input detection range) close to the limit imposed by the used CMOS technology. The PFD is designed in 0.13[Formula: see text][Formula: see text]m BiCMOS technology and has 1.8[Formula: see text]V supply voltage. The simulation results of blind-zone values are within the range from [Formula: see text] for 1[Formula: see text]GHz up to [Formula: see text] for 8[Formula: see text]GHz. This circuit can be used in applications for high-frequency and low-power delay locked loop and phase locked loop circuits, effectively.