Polycrystalline silicon metal-oxide-semiconductor field-effect transistor-based stacked multi-layer one-transistor dynamic random-access memory with double-gate structure for the embedded systems

In this work, a polycrystalline silicon (poly-Si) double-gate metal-oxide-semiconductor field-effect transistor-based stacked multi-layer (ML) one-transistor dynamic random-access memory for the embedded memory is proposed using technology computer-aided simulation. Although poly-Si has advantages of low-cost fabrication and implementation of three-dimensional structure, poly-Si devices suffer from low on-state current ( I on ) due to the low mobility and the scattering by the grain boundary (GB) trap. The stacked ML structure is proposed to improve low I on . As a result of simulation, the ML device obtained a high I on of 87.92 μ A μ m −1 . Owing to the enhancement of I on , the ML achieved a high SM of 30.44 μ A μ m −1 . A retention time (RT) of the proposed ML device in the simulation exhibited 2.94 ms even at a high temperature of 358 K. Moreover, the proposed ML device demonstrates superior reliability in terms of memory operations (RT >100 μ s) for randomly distributed GBs.