Analysis and Decoupling Design of a 30 MHz Resonant SEPIC Converter

This paper presents the analysis and design of a 30 MHz resonant SEPIC converter. With the conventional design method, tuning the amplitude and phase of the fundamental input voltage and current of the rectifier stage affect each other so that the design procedure is coupled seriously. Based on the circuit duality theory, an improved design method is proposed by redividing the resonant SEPIC topology to realize the independent tuning of the amplitude and phase. The implementation and loss analysis of the SEPIC with the new design are provided in details. Moreover, a novel structure of the PCB embedded inductors is introduced and the comparison among the discrete inductor, the planar spiral inductor and the four-layered solenoid PCB inductor is given in terms of the loss. A 15 V input, 25 W/28 V output/30 MHz SEPIC converter was built to verify the proposed design method and the benefit of the new structure of the PCB embedded inductors. The power density of the power stage is realized over 200 W/in3and the efficiency is 82.5% at the rated output. The temperature of the proposed PCB embedded inductor is reduced from 102.6 °C (the discrete inductor) to 64.8 °C (a reduction of 37%) and the efficiency is improved 2% over the discrete solution at the full load.