This article discusses the preparation of device-quality oxide–nitride–oxide (ONO) structures by a sequence of low-temperature plasma-assisted processes. The emphasis is on the relationship between (i) the chemical bonding (a) within the nitride film and (b) at the internal interfaces of a metal–insulator–semiconductor (MIS) structure, and (ii) the electrical properties of these devices with an ONO gate dielectric. In a MIS device, the flatband voltage is shifted from its ideal value by fixed positive charge primarily at the two internal oxide–nitride (O/N) interfaces. The amount of fixed charge is relatively insensitive to the source gas mixture for nitride deposition, and can be reduced by a rapid thermal annealing (RTA) process. Charge trapping at the SiO2/Si interface is increased by N-atom migration to this interface that occurs during the nitride deposition, and is more sensitive to the source gas mixture, but also is decreased by a high-temperature RTA.
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Ma et al. (1993) studied this question.
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