A New Concept of Determining the RFID Chip Impedance

The knowledge on methods for measuring input impedance in microelectronic circuits across various operating frequencies is a critical aspect of designing efficient RFID transponder antennas. The precise determination of this parameter is particularly important for optimizing the overall performance of automatic radio-identification systems in compliance with national standards. The conventional methods in this scope involve direct measurements of RFID chip parameters by using expensive and sophisticated apparatus (e.g., vector network analyzer). Other indirect methods rely on the approximate estimation of this parameter for the fully assembled transponder operating within a test RFID system in a controlled laboratory environment (e.g., anechoic chamber). Therefore, an interesting alternative is to indirectly determine the chip input impedance, by adjusting parameters of the connected antenna and monitoring variations in the minimum power that is supplied to the transponder and at which the chip can be activated (power on tag forward (POTF) characteristic). Thus, the objective of this research is to establish fundamental theoretical relationships that can be used to anticipate fluctuations in the interrogation zone characteristics. These relationships should enable the prediction of how the characteristics change for various levels of impedance mismatch between the antenna and the RFID chip, as values of signal power and operating frequency vary.