An end-to-end CMOS–memristor integrated platform for neural signal processing

This paper presents the design and hardware validation of a CMOS–memristor hybrid neural signal processing platform. The system combines a CMOS neural amplifier, a level-crossing spike encoder, FPGA-based pulse conditioning, and a volatile TiOx memristive integrating sensor (MIS) to convert low-frequency neural activity into spike-based events and then into a compact resistance trajectory. In this study, previously recorded LFP data were preprocessed and replayed through the hardware signal chain, while saline-bath electrode coupling was used as a controlled intermediate validation step between direct electrical injection and future biological acquisition. The results show that the front-end can preserve event timing under electrode-mediated coupling and that temporally clustered spike activity can induce measurable MIS resistance modulation. Overall, the platform demonstrates a feasibility-oriented hardware pathway for sensor-proximal neural activity summarisation, while quantitative event-detection benchmarking, multi-device statistics, and multi-channel MIS validation remain necessary for future deployment-oriented studies.