Sizing Analogue Integrated Circuits by Integer Encoding and NSGA-II

Traditional sizing approaches for analogue integrated circuits (ICs) consisting of metal-oxide-semiconductor field-effect transistors manipulate real values for the widths (W) and lengths (L), thus requiring a post-processing step to round them to multiples of lambda, i.e. the IC fabrication technology. This step may degrade the performance of the objective functions or even violate the constraints. To cope with this problem, an integer encoding is introduced herein, which is used into the Non-dominated Sorting Genetic Algorithm-II (NSGA-II). In this manner, all Ws and Ls are integers and multiples of lambda to guarantee that the solutions provided by NSGA-II are really feasible. The case of study is the sizing of a current conveyor (CCII) using IC technology of 180 nm, for which our proposed integer encoding reduces the execution time in an 18% and the dynamic memory usage in a 50% by applying NSGA-II. Finally, a universal filter and a sinusoidal oscillator are designed using the optimized CCII.