Problem statement: The design and implementation of a sinusoidal Pulse-Width Modulation (PWM) generator for a single-phase hybrid power filter is presented. Approach: The PWM was developed in an Altera ® Flex 10 K Field Programmable Gate Array (FPGA) and the modulation index was selected by calculating the DC bus voltage of the active filter through a digital controller, by Proportional-Integral-Derivative (PID) technique. Results: Experiment results showed the proposed active power filter topology to be capable of compensating the load current and the voltage harmonic, up to IEC limit. Conclusion: The implemented PWM generator using an FPGA required less memory usage while providing flexible PWM patterns whether same phase, lagging, or leading, the reference voltage signal.
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Rahim et al. (2009) studied this question.