Transmission Gate as Buffer for Carbon-Nanotube-Based VLSI Interconnects

In this paper, we propose transmission gates (TGs) as buffers/repeaters for carbon nanotube (CNT)-based VLSI interconnects. Various performance metrics of the TG buffer, viz. propagation delay, crosstalk-induced delay, power dissipation, and power-delay product under super-threshold and sub-threshold conditions are analysed. Performance analysis of TG buffers with CMOS inverter buffers at various interconnect lengths and buffer insertion intervals is done. We have also analysed the performance of Single-wall carbon nanotube (SWCNT) bundle and three different configurations of mixed CNT bundles. By comparing the power-delay product of both the buffers, it is found that TG buffers are more suitable for applications in CNT-based integrated circuits.