Answers are grounded in this paper and cite their sources.
The conventional isolated gate driver (GD) solution for the medium-voltage (MV) SiCmosfetseparates the signal and power transmissions and requires a bulky GD power supply (GDPS). This article presents a signal-power integrated GD for MV SiCmosfets with a compact footprint. The proposed GD transmits both the pulsewidth modulation (PWM) signal and GD power by 20-MHz modulated class-E resonant flyback converters, where the transmitted GD power can maintain constant within the full PWM duty-cycle range (i.e., 0%–100%). In addition, the PWM signal transmission of the proposed GD achieves a low total propagation delay timeRMSand a low coupling capacitance of 5.85 pF. The common-mode transient immunity of proposed GD is higher than 100 V/ns, which is beneficial to drive MV SiCmosfets with highdv/dt. The proposed GD does not require additional GDPSs nor fiber-optics, which achieves a smaller size compared to conventional isolated GDs and is promising to be integrated into SiCmosfetmodule packages. Experimental results on 3.3 kV and 10 kV SiCmosfets are provided to validate the effectiveness of the proposed GD.
No takes yet. Share an insight, caveat, or question.
Guo et al. (2022) studied this question.
Synapse has enriched 10 related papers. Consider them for comparative context: