Lateral vacuum microelectronic logic gate design

A detailed calculation of static electric fields and electron trajectories is used for designs of vacuum microelectronic NOR and NAND logic gates based on a wedge-shaped field emission cathode. A basic pentode device that permits a compact physical layout has lateral electron trajectories and a field emission wedge-shaped cathode. Electric fields at the cathode surface are calculated using a special zooming technique based on a 1600-point spatial matrix. Cathode current is calculated using the Fowler-Nordheim equation form but with constants adjusted to match available experimental data. The gates modeled are direct-coupled-vacuum-microelectronic logic (DCVML) capable of large fan-in and fan-out. The basic pentode device modeled with a 1 mu m cathode-to-extraction grid spacing has total layout dimension of 17 mu m. The pentode device geometry greatly reduces a major problem of high grid current by making use of two deflector electrodes. The deflectors also provide trajectory confinement to reduce the device size.