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A fuzzy logic controller architecture that is efficient in both performance and cost is proposed. Optimization of the fuzzy logic circuits is discussed. To speed up the inference process, the defuzzification operation is precomputed, and partial results are stored for runtime uses. Thus, larger memory is traded for better performance. The proposed architecture is less general than previous implementations, but offers better performance and cost.>
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Tzi‐cker Chiueh (1992) studied this question.
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