Oversampling A/D Converters With Reduced Sensitivity to DAC Nonlinearities

To alleviate the image-rejection requirements of the front-end filters and the feedback digital-to-analog converter (DAC) matching requirements, an oversampling complex discrete-time (DT) DeltaSigma analog-to-digital converter (ADC) with a signal-transfer function that achieves significant filtering of interfering signals is proposed. With a filtering signal transfer function (STF) and stopband attenuation greater than 30 dB, the DeltaSigma modulator reduces the intermodulation of the desired signal and the interfering signals at the input of a quantizer, and also avoids feedback of high-frequency interfering signals at the input of the modulator. This filtering of the interfering signals reduces sensitivity to DAC nonlinearities. The reported DT complex DeltaSigma ADC is intended for digital television (DTV) receiver applications. With a maximum intended sampling frequency of 128 MHz and an oversampling ratio of 16, the ADC has been designed to support a maximum DTV signal bandwidth of 8 MHz. The IC achieved a 70.9-dB signal-to-noise-and-distortion ratio over a 6-MHz band centered around 3 MHz. The image-rejection ratio of the DeltaSigma ADC was measured to be greater than 65 dB. The fabricated chip consumes 122.4 mW and occupies a silicon area of 2.15 mm2.