A Model for Quantifying and Propagating Uncertainty of Precise Time Measurement System With Tapped-Delay-Line Time-to-Digital Converters

To evaluate the uncertainty of high-performance integrated circuits in precise time-interval measurements, we designed a time-to-digital converter using a typical tapped-delay-line (TDL) architecture implemented on a field-programmable gate array (FPGA). Using a 28-nm Xilinx Kintex-7 FPGA chip, we established a precise time measurement system that achieves a measurement precision better than 22 ps. Detailed modeling and analysis of measurement uncertainty identified potential error sources in the TDL time-to-digital converters design and implementation. We analyzed various factors, including time-interval quantization, fine time interpolation, signal input and sampling, signal propagation, and clock signals to reliably evaluate the time-to-digital converter’s resolution. By analyzing uncertainty sources and applying reasonable distribution assumptions, an adaptive Monte Carlo method (AMCM) was used to propagate and evaluate uncertainty components. This approach showed good consistency with the guide to the expression of uncertainty in measurement (GUM), providing valuable insights for evaluating more complex time-to-digital converter (TDC) architectures. These analyses and experiments also offer guidance for using advanced manufacturing processes to enhance the resolution and precision of precise time-interval measurement systems.