This paper deals with a top down design methodology to DSP algorithms based on FPGA. Additionally, DSP algorithms, such as FIR filters, fast Fourier transform (FFT), and the high-frequency resonance technique (HFRT), are implemented in the hardware embedded in the FPGA using a MATLAB/SIMULINK model. The principle idea of this approach is the advantage of a MATLAB/SIMULINK model created to be generic, flexible and can be easily changed at the end user. To validate our approach, an HFRT algorithm to identification the fault in rolling bearings is implemented in FPGA.
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Kashiwagi et al. (2014) studied this question.