The Pt/Ti electrode stacks were deposited on the SiOx/Si substrate by DC magnetron sputtering. The Pt layers were deposited at various temperature of RT∼500°C. These electrode stacks were annealed at 650°C for 30min in O2ambient. A lot of high hillocks were observed on the Pt surface deposited at low temperatures (RT∼300°C) after the anneal process. But the hillocks were decreased in both number and height with increasing the deposition temperature of the Pt layer. We found in both SEM inspection and stress measurement that the deposition temperature dependence of the Pt hillock formation could be explained by the difference in the intrinsic stress generated during deposition process. We also demonstrated the effect of Pt hillocks on electrical properties of SBT capacitor. The 2Pr values of the SBT capacitors were about 13μ C/cm2regardless of the Pt deposition temperatures. But the short probabilities were decreased with the increase of the Pt deposition temperatures. This result is well consistent with the trend of Pt hillock formation.
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Kweon et al. (1999) studied this question.
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