Graphene field effect transistors and capacitors that employ ultra-thin atomic layer deposited high-κ TiO2 dielectrics are demonstrated. Of the three TiO2 gate insulation schemes employed, the sequentially deposited HfO2:TiO2 gate insulator stack enabled the reduction of equivalent oxide thickness while simultaneously providing an ultra-thin gate insulation layer that minimized gate leakage current. The multilayer gate insulation scheme demonstrates a means for advanced device scaling in graphene-based devices.
No takes yet. Share an insight, caveat, or question.
Deen et al. (2013) studied this question.
Synapse has enriched 5 closely related papers on similar clinical questions. Consider them for comparative context: