One of the most power consuming components of a modern noncardiac pacemaker is the oscillator circuitry. This brief details the design of a micropower, low voltage, low frequency oscillator consisting of CMOS devices operating in subthreshold. Since the frequency of a typical oscillator is proportional to Current/Capacitance, the operation of the transistors in the subthreshold region allows the size of the capacitance to be reduced significantly in addition to decreasing the quiescent power consumption. The proposed prototype oscillator was fabricated in a 2 /spl mu/m n-well CMOS process and occupies 0.281 mm/sup 2/ including a 100 pf capacitor which takes 77.8% (0.219 mm/sup 2/) of the total area. Experimental results show a frequency of oscillation as low as 0.3 Hz and a power consumption of around 0.24 /spl mu/W at 0.3 Hz to 0.3 /spl mu/W at 100 Hz with a 2 V supply voltage.
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Hwang et al. (1995) studied this question.
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