The deposition of metal lines onto transparent conductive electrodes (TCEs) provides a path to high‐efficiency, large‐area monolithic submodule solar cells by reducing series resistance and improving charge collection. However, the metal lines introduce optical and geometric losses through shading and inactive regions, creating a trade‐off between resistive and optical performance. A device model is developed to quantify this trade‐off across multiple photovoltaic architectures, including organic and perovskite single‐junction devices and a range of tandem devices, to predict the maximum achievable efficiency of wafer‐scale devices using state‐of‐the‐art small‐area record performance as a benchmark. The results indicate that, when upscaled to wafer‐size submodules, single‐junction organic and perovskite solar cells are generally more susceptible to efficiency losses, whereas tandem architectures, including silicon‐ and III–V‐based devices, are more likely to retain high power conversion efficiencies (PCE). In particular, perovskite‐silicon tandem submodules can realistically retain PCE above 30% in simple two‐terminal configurations. In addition, a generalized method applicable across a range of materials and architectures is presented to determine the optimal metal line spacing using a limited set of device and TCE parameters. This provides a practical tool for translating laboratory‐scale results into scalable monolithic submodule designs and offers clear guidelines for minimizing losses during upscaling.
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Papale et al. (2026) studied this question.
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