Investigation of Bias-Temperature Instability in work-function-tuned high-k/metal-gate stacks

The impact of Vth-adjusting layers on high-k/metal-gate n- and pFinFET Vth stability is investigated. Additional insight is gained by monitoring ΔVth recovery transients over several decades in time. Vth-adjusting capping layers deposited directly on top of the gate dielectric degrade the Vth stability. The Vth stability improves as the capping layers are buried in the gate metal and are thus isolated from the gate dielectric. A combination of a capping layer thickness and depth in the metal gate is found that practically eliminates nFET Vth instability.