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The memristor—the fourth fundamental two‐terminal circuit element—has become a key building block of neuromorphic computing, in‐memory analogue arithmetic, and hardware‐rooted security primitives. Despite this prominence in research, fabricated memristive devices remain inaccessible to most undergraduate teaching laboratories, and the topic is therefore typically restricted to symbolic exposition. This paper presents an open‐source pedagogical packaging of the well‐established CMOS‐inverter + integrating‐capacitor + OTA memristor emulator topology, adopted as is from several prior reports since 2014. The contribution is a turn‐key teaching package: a single plain‐text SPICE netlist that runs unmodified under the open‐source ngspice and the freely distributed LTspice; a Python post‐processing pipeline; a closed‐form first‐order model that predicts the hysteresis lobe area from the integrating capacitance, the transconductance and the excitation amplitude, giving instructors an analytic marking target; three laboratory exercises with assessment rubrics scaling along Bloom‐taxonomy levels Remember → Apply → Analyse, differentiated into a second‐year and a third‐year track; and a public release under the MIT License. Over the 1 – 100 kHz band, the emulator satisfies all three of Chua's signatures quantitatively: the v – i locus is pinched at the origin to within of the current amplitude, the lobe area decays as (measured log–log slope −1.000), and it grows as the cube of the excitation amplitude (slope +3.01). Measurements agree with the closed‐form model to a constant 4.3% across four parameter sweeps. The package needs no licence, no fabricated device and no specialised CAD environment.
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Fatih Gül (2026) studied this question.
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