Gallium nitride nanowire nonvolatile memory device

We report the fabrication and characterization of gallium nitride (GaN) nanowire nonvolatile memory field-effect transistors (FETs). The memory device was implemented using a top-gate GaN nanowire FET with an oxide layer as a storage node. A 40nm thick silicon dioxide layer was embedded between the top metal gate and the nanowires, which was deposited using plasma enhanced chemical vapor deposition. Charges were stored in and released from the oxide layer by applying negative and positive gate biases, respectively. It is suggested that charge transport at the gate edge is responsible for the write and erase mechanisms. The locally enhanced electric field at the gate edge induces Fowler-Nordheim tunneling from the metal gate, while the much lower field near the interface between the oxide and the nanowire channel suppresses charge transport.