Under the assumption that a processor may have a multiplicity of arithmetic units, a compiler for such a processor should produce object code to take advantage of possible parallelism of operation.Most of the presently known compilation techniques are inadequate for such a processor because they produce expression structures that must be evaluated serially.A technique is presented here for compiling arithmetic expressions into structures that can be evaluated with a high degree of parallelism.The algorithm is a variant of the socalled "top-down" analysis technique, and requires only one pass of the input text.term(level) end
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Harold S. Stone (1967) studied this question.
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