The utilization of vector-arithmetic logic units is a promising way to speed up FDTD computations from the viewpoint of hardware acceleration. This paper studies how a streaming SIMD extensions (SSE) implementation can be effi ciently developed, and the situation where SSE is benefi cial for FDTD computations.
No takes yet. Share an insight, caveat, or question.
Livesey et al. (2012) studied this question.
Synapse has enriched 5 related papers. Consider them for comparative context: