Charge-trapping memory cell of SiO2∕SiN∕high-k dielectric Al2O3 with TaN metal gate for suppressing backward-tunneling effect

We present a device structure of SiO2∕SiN∕Al2O3 (SANOS) with tantalum nitride (TaN) metal gate. When TaN metal gate is applied for the SANOS structure instead of commonly used n-type poly-silicon, the unwanted backward Fowler–Nordheim tunneling current of electron through the top oxide is significantly suppressed owing to its higher work function and better compatibility with high-k dielectrics. As a result, the program∕erase speed is significantly improved and the erase threshold voltage (VTH) can be obtained to be negative voltage of −3.5V.