Effect of BTI Degradation on Transistor Variability in Advanced Semiconductor Technologies

The effect of PMOS transistor negative bias temperature instability (NBTI) on product performance is a key reliability concern. As technology scales and device dimensions shrink, the trend in theVTvariability at both time zero and after NBTI aging increases. The time0VTvariability can be explained by the random nature of dopants, whereas the randomly generated defects in the gate oxide can account for the aging-induced device DeltaVTvariability. This paper focuses on the bias temperature instability stress-induced device DeltaVTvariability and the trend across several technology generations. The remarkable correlation of aging-induced DeltaVTvariability to the gate oxide area suggests that the continued device geometry scaling will increase the aging-induced variability. For the first time, aging-induced DeltaVTvariability was characterized on transistors fabricated with high-kappa gate dielectric that also showed similar dependence to the gate oxide area.