Hybrid approximate-accurate neural network using vertical NAND flash memory

We propose a hybrid approximate-accurate neural-network scheme based on commercial vertical NAND (V-NAND) flash memory, in which device-level noise characteristics are directly linked to layer-dependent inference conditions. V-NAND flash memory provides a dense and manufacturable platform for neuromorphic hardware, but its low-frequency read noise can degrade analog inference accuracy. Electrical measurements on a commercial >100-layer V-NAND device show that carrier-number fluctuation is the dominant origin of the normalized read-current noise under the measured conditions. Based on this behavior, a layer-wise read-bias (LW-VRead) scheme is used to lower the read and pass biases of noise-tolerant layers, whereas a tied-word-line (t-WL) weight representation is used to suppress normalized noise and enable finer conductance control in accuracy-critical operation. The measured device characteristics are incorporated into VGG-9/CIFAR-10, ResNet-18/CIFAR-100 and VGG-19/CIFAR-100 inference simulations. The hybrid scheme improves inference accuracy while substantially reducing synaptic read power; the VGG-9/CIFAR-10 case shows a 93.24% reduction in synaptic read power, and the ResNet-18/CIFAR-100 case shows a 47.19% reduction, relative to the corresponding conventional biasing conditions. These results place commercial V-NAND flash memory in a practical operating space between approximate and accuracy-oriented neuromorphic inference through device-circuit-algorithm co-optimization.