TinyBatteryNet: A compact neural architecture for embedded battery remaining useful life prediction across battery domains

Early prediction of battery remaining useful life (RUL) is important for safe operation, maintenance, and second-life decisions, and for understanding how degradation information emerges in early charge/discharge waveforms. Existing deep prognostic models are often dataset-specific, provide limited evidence about which waveform scales and cycle intervals support their predictions, and exceed microcontroller memory budgets. We propose TinyBatteryNet, a 43,379-parameter architecture trained separately in each battery domain. It integrates a three-branch depthwise-separable convolutional pyramid, Squeeze-and-Excitation recalibration, a masked learnable cycle gate, and a gated recurrent unit to represent intra-cycle morphology and inter-cycle evolution. Beyond model compression, the novelty is its joint design for accuracy and embedded deployment, supported by controlled ablations and learned-weight diagnostics that examine where early-life information is expressed without assigning unsupported causal electrochemical mechanisms. Across 995 Li-ion, Zn-ion, Na-ion, and commercial CALB cells, TinyBatteryNet obtains mean absolute percentage errors of 0.170, 0.368, 0.232, and 0.133, respectively. These values are lower than the strongest reported BatteryLife baseline in each domain (11.9% average and 28.5% maximum relative reduction), although training recipes differ, and TinyBatteryNet uses 24–50 × fewer parameters. Ablations identify complementary receptive fields as the most consistently beneficial component, whereas channel recalibration and cycle weighting are domain-dependent. Thus, predictive behaviour reflects local-to-broad waveform morphology and non-uniform cycle relevance rather than a universal learned mechanism; the higher Zn-ion error further exposes limitations under irregular degradation. STM32F407VG target-mode validation reports 44.2 KB peak runtime RAM and 0.32 ms kernel inference, supporting MCU-level feasibility but not complete physical-board battery-management-system validation.