The programmable cores on SoCs can perform on-chip test generation, measurement, response analysis, and even diagnosis. This software-based approach to self-testing enables at-speed testing and incurs low DFT overhead. We give an overview of the existing embedded software-based self-testing and self-diagnosis methods for core-based SoC designs, and we discuss the challenges to further developing this new testing paradigm.
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Krstić et al. (2002) studied this question.
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