Optimizing gate voltage of SiC MOSFETs to enhance the lifetime and reliability of an H-ANPC inverter

SiC MOSFETs offer significant advantages over their silicon counterparts, including higher breakdown voltage, faster switching speed, and better thermal conductivity, making them well-suited for high-frequency, high-voltage, and high-temperature applications in power electronics. Nevertheless, the long-term reliability of SiC MOSFETs remains a major challenge, as device failures can lead to system-level malfunctions, unplanned outages, and elevated safety risks, particularly in mission-critical applications. To assess their reliability under typical converter stresses, a hybrid-active neutral point clamped (H-ANPC) inverter is used. The H-ANPC inverter efficiently balances switching losses and thermal stress, providing higher efficiency and better thermal management, making it ideal for high-power applications requiring robust, long-term reliability. This article proposed an active gate voltage control (AGVC) technique, which is used to develop a scheme for optimizing gate voltage to improve the reliability and lifetime of SiC MOSFETs within the H-ANPC inverter. To determine the lifetime models of SiC MOSFETs in the H-ANPC inverter, two accelerated tests (ATs), the inverter-like accelerated test (IAT), and the time-dependent dielectric breakdown (TDDB) test are applied. Although the IAT-based lifetime model indicates SiC MOSFET reliability, gate voltage variations make it crucial to assess impacts on gate oxide degradation by the TDDB-based lifetime model. The article includes detailed explanations of the experimental setups for IAT, TDDB, and the H-ANPC inverter, along with an analysis of the results and lifetime modeling. Also, the AGVC scheme (AGVCS) is tested within the IAT framework, and results are provided. Together, these insights highlight strategies for enhancing the reliability and lifetime of SiC MOSFETs in H-ANPC inverter applications.