Counter‐Anion‐Engineered Solid‐State Polymer Electrolytes for Vertically Stacked Artificial Synapses With Configurable Plasticity

Neuromorphic hardware requires artificial synapses (ASs) with configurable plasticity to support diverse signal‐processing functions while employing device architectures that minimize interconnect complexity among functional components. Electrolyte‐gated synaptic transistors enable low‐voltage conductance modulation, tunable synaptic plasticity, and mechanical flexibility through ion‐mediated operation. However, the use of gel or liquid electrolytes often compromises mechanical robustness and processability. Here, we report ASs based on solid‐state cationic polyurethane (cPU) gate dielectrics, in which Li + mobility is regulated by the counter‐anion of the cPU. Compact Br − counter‐anions suppress Li + transport and redistribution, thereby enabling long‐term synaptic plasticity. In contrast, bulky BPh 4 − counter‐anions weaken Li + coordination and facilitate Li + transport through anion exchange with Tf 2 N − , resulting in short‐term synaptic plasticity. The counter‐anion‐dependent Li + transport mechanism is validated by first‐principles calculations and electrochemical impedance spectroscopy. We further integrate these counter‐anion‐engineered devices into vertically stacked, array‐level architectures that implement reconfigurable AND/OR logic and in‐memory computing via multiply‐accumulate operations. This strategy establishes a foundation for future neuromorphic hardware by engineering solid‐state ion dynamics to achieve configurable plasticity, vertical integration, and multifunctional array‐level operation.