Read stress suppression by a 2-step read operation in In–Sb–Te selector-only memory

Selector-only memory (SOM) based on ovonic threshold switch integrates selector and memory functions in a single device but suffers from RESET state failure under repeated subthreshold read stress, and the electrical conditions governing this degradation remain insufficiently understood. Here, we demonstrate a hold voltage assisted 2-step read operation for In12Sb19Te69 based SOM, in which a brief 2.4 V trigger activates SET cells, and a 1.8 V sensing phase then maintains the SET state while suppressing RESET state leakage. Because the RESET state off current is associated with thermally assisted hopping, the lower sensing voltage reduces the charge injection by 77.4% and improves the ON/OFF ratio from 53 to 280. Constant voltage stress measurements show that cumulative injected charge alone does not account for RESET state failure, while pulse width dependent endurance measurements indicate that the read voltage condition strongly affects the electrical stress imposed during each read event. Consequently, nine out of ten 2-step devices survive through the 1010 cycle limit, whereas square read devices typically survive only up to approximately 107 cycles, without any material or stack modification.