This paper details the design of a multifunctional front-end microwave monolithic integrated circuit (MMIC) intended for downconverter applications in the 1–3 GHz frequency range. The primary objective of this research is to develop a compact, high-performance MMIC that integrates three critical receiver functions—a low-noise amplifier (LNA), a 2-bit digital attenuator, and a single-pole five-throw (SP5T) switch—on a single gallium arsenide (GaAs) pHEMT die using a domestic technological process. The LNA employs a two-stage cascaded common-source configuration with RC-feedback networks to achieve wideband matching and low noise. The digital attenuator is constructed using a bridged T-network for 6 dB attenuation and a Π-network for 12 dB attenuation. The SP5T switch utilizes a series-shunt topology with a five-way combining junction to minimize chip area. Electromagnetic simulation results for the complete front-end demonstrate excellent performance, achieving a gain of no less than 29.9 dB, a noise figure not exceeding 1.21 dB, and an input and output return loss better than -8.4 dB across the operating band. The linearity figures, a P1dB of 20.6 dBm and an OIP3 of 30.1 dBm, confirm its suitability for demanding receiver systems. Furthermore, a comparative analysis against commercial analogues shows that the designed MMIC offers a competitive combination of wide bandwidth, low noise, moderate current consumption (under 85 mA at 5 V), and a compact layout (3.4 mm × 3.2 mm), validating its potential as a viable domestic alternative for high-performance microwave modules.
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Klimenko et al. (2026) studied this question.
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