A 60-GHz waveform-sharing joint radar-communication (JRC) transceiver with phase-locked loop (PLL)-based chirp spread spectrum (CSS) modulator is presented for seamless integrated sensing and communication (ISAC). Unlike existing communication-centric JRC transceivers that prioritize high throughput, the proposed sensing-centric transceiver employs unified CSS waveforms to perform uncompromised sensing performance while enabling robust long-range communication. To this end, a PLL-based CSS modulator is implemented, simplifying the transceiver architecture while generating wideband CSS signals with high chirp slope, superior linearity, and low phase noise. Within this modulator, a multi-bank capacitor array is integrated into a two-point modulation (TPM)-based sub-sampling (SS) PLL, enabling fast wideband chirp generation and rapid frequency hopping while achieving excellent phase noise. Moreover, an adaptive binary-search (BS) overlap compensation scheme is proposed to mitigate the discontinuity issues in the multi-bank capacitor array while ensuring robust and orderly convergence. Furthermore, building on the TPM-based sub-sampling PLL (SSPLL), a digital CSS modulation engine is developed to enable wideband CSS signal generation without compromising the chirp linearity. Fabricated in a 65-nm CMOS process, the CSS transceiver core occupies 6.11 mm2and consumes 568 mW. For the over-the-air (OTA) test, broadband high-gain horn antennas with a gap waveguide (GW)-based transition are integrated with the chip through a low-loss wire-bonding matching scheme, achieving a low-cost, compact, and reliable assembly. OTA measurements demonstrate that the measured range resolution is approximately 5.5 cm, while achieving a communication range exceeding 500 m at a 4.138 Mbps data rate with a bit error rate (BER) below10⁻⁵.
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Wang et al. (2026) studied this question.
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