Calibration-Based Electrical Estimation of Transient Self-Heating in Packaged Si and SiC Power FETs Using Pulsed I–V Measurements

Self-heating modifies the electrical characteristics and reliability of power semiconductor devices, but direct temperature measurement often requires dedicated sensors or thermal instrumentation. This study develops a calibration-based electrical procedure for estimating pulse-width-dependent self-heating from measurements obtained with a commercial power-device analyzer. Packaged 650 V-class Si super-junction and SiC cascode FETs were characterized using pulsed I–V measurements, while the temperature dependence of the on-state drain current was calibrated from 25 to 125 °C. A 60 μs pulse condition, for which the measured current approached a short-pulse plateau within the analyzed range, was used as a differential reference rather than as an absolute zero-heating condition. Current reduction at longer pulse widths was converted into an effective temperature rise and a power-normalized transient thermal metric. The electrically inferred temperature rise and power-normalized transient metric increased systematically with pulse width and were consistent with independent thermal transient measurements obtained using a T3STER thermal transient characterization system. The results support the feasibility of comparative electrothermal characterization of these devices under the investigated controlled on-state pulse conditions. The inferred temperature rise is electrically weighted and defined relative to the 60 μs reference, rather than representing a spatially resolved peak junction temperature. Broader applicability and absolute temperature-estimation accuracy require further validation.