State-Space Generation via Modified MNA for Numerical Integration Applications

This article derives a state-space (SS) model directly from an admittance-based MNA model using linear transformations and the Schur complement. The resulting system has dimension equal to the number of independent inductors and capacitors, takes the form Eⱼẋₛₛ+Gⱼxₛₛ+Pⱼuₛₛ=0 E j x ˙ ss + G j x ss + P j u ss = 0 and is graph-theory-free, as are the method’s two exceptions: circuits with more xₛₛ x ss candidates than nodes, and parallel LL/LC combinations. When the formulation requires separating resistive elements from energy-storage elements, graph theory is employed to obtain Eₛₛẋₛₛ+Gₛₛxₛₛ+Pₛₛuₛₛ=0 E ss x ˙ ss + G ss x ss + P ss u ss = 0 . In this formulation, Eₛₛ E ss includes only capacitors and inductors (through addition and subtraction), while Gₛₛ G ss contains only resistive elements and couplings. The method is validated on ideal circuits, circuits with parasitic elements, circuits with nonlinear models, and degenerate circuits (capacitor delta). In comparisons, the SS system agreed with MNA simulation, for both fixed and variable step sizes. Flop counting shows an advantage of state-space for low state space quantities systems. It is concluded that the relative computational cost depends not only on the reduced system dimension but also on the sparsity preserved by the MNA structure.