Proving That a GPU, NPU, DPU or Other Device Consumed the Intended Command, Used Current Memory Translations and Produced Only the Declared Effect

AI workloads reach hardware through runtimes, drivers, command queues, firmware and IOMMU/SMMU translations before a GPU, NPU, DPU or other device produces an effect. Permission to compute, driver acceptance, a descriptor that was inspected a moment ago and the host’s current page tables do not prove what the device actually did. A descriptor can change after it was checked; a stale IOTLB entry can direct DMA to the wrong page; a reset or firmware update can reuse a queue slot for another tenant; a replayed command can be consumed twice; and a SmartNIC or peer-to-peer path can produce a network or storage effect that no one authorized. This disclosure describes a vendor-neutral, non-actuating method for reconstructing silicon-level consistency from evidence. Each hardware command is bound to an original operation, principal and permitted class. The descriptor the device actually consumes is compared by digest with the approved one. Queue, mapping, firmware and device-incarnation generations must be current; DMA bounds and permissions must hold; translation invalidation must be acknowledged; admission must cover every effect path and be replay-safe; and device completion and the observed effect must correspond to the original operation. Results are combined in three-valued logic: a proven contradiction yields CONTRADICTED even when other evidence is missing, full support yields SUPPORTED, and gaps yield UNRESOLVED — in particular, missing effect telemetry is never treated as proof that no effect occurred. The document provides a 60-stage, six-phase silicon workflow and a separate 60-stage integratedembodiment, each with flowcharts, 72 technical invariants, twelve hardware variations (GPU, DPU/SmartNIC, CPU trusted domains, chiplets, firmware, peripherals), 48 formal relations, 60 engineering checkpoints, a comparison with existing mechanisms (IOMMU/SMMU and ATS invalidation, PCIe IDE and TDISP, confidential-computing device assignment, SR-IOV and function-level reset, doorbell and queue protections, device attestation with SPDM, GPU command validation and DPU offload) and anon-actuating reference evaluator in Python, JavaScript and Go with 90 shared synthetic vectors, all passing. It is not hardware-validated or certified; the laboratory is synthetic, self-authored and not peer reviewed. The author is open to acquihire or strategic collaboration.