January 1, 1985

The effects of wafer to wafer defect density variations on integrated circuit defect and fault distributions

Key Points

Key points are not available for this paper at this time.

Abstract

A method for modeling the variations in defect levels in circuits produced on modern integrated circuit manufacturing lines is described in this paper. The effects on defect and fault distributions are derived. A deficiency in some previous yield models is eliminated.

Ask AI

Helpful

Bookmark

Cite This Study

C.H. Stapper (Tue,) studied this question.

synapsesocial.com/papers/6a1e6d8060864841a668e0db https://doi.org/https://doi.org/10.1147/rd.291.0087

Also Consider

Synapse has enriched 5 closely related papers on similar clinical questions. Consider them for comparative context:

1Yield model for fault clusters within integrated circuits1984 · 49 citations
2Yield Model for Productivity Optimization of VLSI Memory Chips with Redundancy and Partially Good Product1980 · 243 citations
3On a New Class of "Contagious" Distributions, Applicable in Entomology and Bacteriology1939 · 469 citations
4An introduction to probability theory and its applications1958 · 29,966 citations
5Defect density distribution for LSI yield calculations1973 · 182 citations

Ask AI

Helpful

Bookmark