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High-k metal oxide gate dielectrics may be required to extend Moore’s law of semiconductor device density scaling into the future. However, growth of a thin SiO2-containing interface layer is almost unavoidable during the deposition of metal oxide films onto Si substrates. This limits the scaling benefits of incorporating high-k dielectrics in future transistors. A promising approach, in which oxygen-gettering metal overlayers are used to engineer the thickness of the SiO2-based interface layer between metal oxide and Si substrate after deposition of the metal oxide layer, is reported. Using a Ti overlayer with high solubility for oxygen on ZrO2 or HfO2 dielectrics, the effective removal of the low-k interface layer at 300K has been confirmed by electron microscopy and spectroscopy techniques. Significant enhancement of the gate capacitance density, while retaining low leakage current densities, has also been demonstrated for these interface-engineered high-k gate stacks.
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Hyoungsub Kim
Ansan University
Paul C. McIntyre
SLAC National Accelerator Laboratory
Chi On Chui
Taiwan Semiconductor Manufacturing Company (Taiwan)
Journal of Applied Physics
Stanford University
University of California, Santa Barbara
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Kim et al. (Thu,) studied this question.
synapsesocial.com/papers/6a20824155df6adc1bcd45f2 — DOI: https://doi.org/10.1063/1.1776636