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When applied to artificial intelligence edge devices, the conventionally von Neumann computing architecture imposes numerous challenges (e.g., improving the energy efficiency), due to the memory-wall bottleneck involving the frequent movement of data between the memory and the processing elements (PE). Computing-in-memory (CIM) is a promising candidate approach to breaking through this so-called memory wall bottleneck. SRAM cells provide unlimited endurance and compatibility with state-of-the-art logic processes. This paper outlines the background, trends, and challenges involved in the further development of SRAM-CIM macros. This paper also reviews recent silicon-verified SRAM-CIM macros designed for logic and multiplication-accumulation (MAC) operations.
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Chuan-Jia Jhang
Cheng-Xin Xue
Je-Min Hung
IEEE Transactions on Circuits and Systems I Regular Papers
National Tsing Hua University
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Jhang et al. (Mon,) studied this question.
www.synapsesocial.com/papers/6a0d47f6389a567298ba6c3a — DOI: https://doi.org/10.1109/tcsi.2021.3064189