ABSTRACT To address the fundamental challenges of limited parallelism and escalating energy consumption inherent in traditional digital artificial intelligence (AI) hardware—stemming from the von Neumann bottleneck—photonic integrated circuits (PICs) have emerged as a pivotal solution, offering the synergistic potential of high parallelism, ultra‐high speed, and low power consumption. Here, we present a photonic neural network (PNN) based on programmable phase‐change metasurfaces, which realizes an on‐chip reconfigurable parallel computing architecture through the monolithic integration of non‐volatile programmable power beam‐splitters, higher‐order mode couplers, and multimode cross‐waveguides. The programmable power beam‐splitter achieves a high precision of 9 bits, supports TE 0 and TE 1 input modes, and operates across a broad wavelength range of 1480–1620 nm. With matching bandwidths, the mode coupler and cross‐waveguide ensure scalability for large‐scale optical networks. Fabricated on a silicon‐on‐insulator (SOI) platform and fully compatible with complementary metal‐oxide‐semiconductor (CMOS) processes, the PNN demonstrates industrialization potential. In handwritten digit recognition tasks, it achieves a classification accuracy of 98.95%, while exhibiting intrinsic advantages in speed and power efficiency. This work validates the efficacy of non‐volatile phase‐change materials (PCMs) in PNNs and presents a scalable hardware paradigm for high‐performance computing. Our findings pave the way for next‐generation photonic intelligent processors, with promising applications in edge computing and data centers.
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Shengru Zhou
Hansi Ma
Huan Yuan
Advanced Optical Materials
Sichuan University
Southwest University
National University of Defense Technology
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Zhou et al. (Wed,) studied this question.
synapsesocial.com/papers/69b257bf96eeacc4fcec6a3a — DOI: https://doi.org/10.1002/adom.202502670